| Verilator open-source SystemVerilog simulator and lint system - CHIPS Alliance - chipsalliance |
| https://github.com/chipsalliance/verilator | ||
| Size | 104.9M (104.1M (+756K)) | |
| Commits | 8956 (8938 (+18)) | |
| Update Stats | 0s ... 21s [Ø (last 10) 5s (4,4,4,4,4,5,5,6,5,5))] | |
| Last Change | 2026-01-09 17:46:47 | |
| Last Check | 2026-01-09 17:46:47 | |
| Created | 2023-06-01 00:01:21 |
Operation
Verifying url ...
Mail to Andreas Kupries