Verilator open-source SystemVerilog simulator and lint system - CHIPS Alliance - chipsalliance |
GitHub | https://github.com/chipsalliance/verilator | |
Size | 40.8M (40.8M (+4K)) | |
Commits | 6164 (6089 (+75)) | |
Update Stats | 0s ... 21s [Ø (last 10) 2s (2,2,2,2,2,2,1,2,2,1))] | |
Last Change | 2023-06-02 05:16:39 | |
Last Check | 2023-09-16 04:46:58 | |
Created | 2023-06-01 00:01:21 |
Operation
Verifying url ...
Mail to Andreas Kupries