Verilator open-source SystemVerilog simulator and lint system - CHIPS Alliance - chipsalliance |
https://github.com/chipsalliance/verilator | ||
Size | 178.0M (176.5M (+1.5M)) | |
Commits | 8369 (8341 (+28)) | |
Update Stats | 0s ... 21s [Ø (last 10) 10s (9,15,11,10,9,9,9,9,9,9))] | |
Last Change | 2025-09-10 21:46:47 | |
Last Check | 2025-09-10 21:46:44 | |
Created | 2023-06-01 00:01:21 |
Operation
Verifying url ...
Mail to Andreas Kupries