Verilator open-source SystemVerilog simulator and lint system - CHIPS Alliance - chipsalliance |
https://github.com/chipsalliance/verilator | ||
Size | 184.5M (182.8M (+1.8M)) | |
Commits | 8477 (8449 (+28)) | |
Update Stats | 0s ... 21s [Ø (last 10) 10s (9,9,9,9,9,9,11,10,10,10))] | |
Last Change | 2025-09-24 09:46:44 | |
Last Check | 2025-09-24 09:46:41 | |
Created | 2023-06-01 00:01:21 |
Operation
Verifying url ...
Mail to Andreas Kupries