 |
2nd order Sigma-Delta DAC - FreeCores - freecores |
https://github.com/freecores/sigmadeltadacdualloop |
|
 GitHub |
0 |
296K |
2 |
2023-09-17 10:43:22 |
2026-02-26 10:03:43 |
2023-09-17 10:43:22 |
|
A collection of example workloads for Parallel JavaScript - Intel Labs - IntelLabs |
https://github.com/IntelLabs/ParallelJavaScript |
|
GitHub |
3 |
144.4M |
36 |
2023-09-17 11:36:51 |
2026-02-26 17:06:45 |
2023-09-17 11:36:51 |
|
A high-performance DSL for deep neural networks in Julia - Intel Labs - IntelLabs |
https://github.com/IntelLabs/Latte.jl |
|
GitHub |
11 |
5.4M |
315 |
2023-09-17 11:39:53 |
2026-02-26 17:26:45 |
2023-09-17 11:39:53 |
|
a physics-based game that uses River Trail for collision detection - Intel Labs - IntelLabs |
https://github.com/IntelLabs/RiverTrail-TourDeBlock |
|
GitHub |
2 |
45.4M |
29 |
2023-09-17 11:40:01 |
2026-02-26 17:26:45 |
2023-09-17 11:40:01 |
|
A Python based QR code extractor that uses OpenCV to detect and extract multiple QR codes in any orientation. - MikhailGordeev |
https://github.com/MikhailGordeev/QR-Code-Extractor |
|
GitHub |
0 |
344K |
8 |
2022-07-24 12:16:30 |
2026-02-25 05:06:42 |
2022-07-24 12:16:30 |
|
A SIXEL encoder/decoder implementation derived from kmiya's sixel (https://github.com/saitoha/sixel). - Hayaki Saito - saitoha |
https://github.com/saitoha/libsixel |
|
GitHub |
77 |
81.7M |
4083 |
2025-11-07 12:36:56 |
2026-02-25 10:36:43 |
2022-07-24 13:26:41 |
|
A Triple Modular Redundancy (TMR) wrapper around the Minimax RISC-V CPU. - Graeme Smecher - gsmecher |
https://github.com/gsmecher/minimax-tmr |
|
GitHub |
0 |
488K |
8 |
2023-10-21 18:05:54 |
2026-02-27 09:16:42 |
2023-10-21 18:05:54 |
|
A x86 Virtual Machine Monitor including device modules and instruction emulator. Standalone version of the Vancouver VMM. - Intel Labs - IntelLabs |
https://github.com/IntelLabs/seoul |
|
GitHub |
0 |
7.9M |
2178 |
2023-09-17 11:38:12 |
2026-02-26 17:16:46 |
2023-09-17 11:38:12 |
|
An API for data parallelism in JavaScript - Intel Labs - IntelLabs |
https://github.com/IntelLabs/RiverTrail |
|
GitHub |
69 |
42.4M |
579 |
2023-09-17 11:38:33 |
2026-02-26 17:16:46 |
2023-09-17 11:38:33 |
|
An interactive shell in your browser for writing and running River Trail programs - Intel Labs - IntelLabs |
https://github.com/IntelLabs/RiverTrail-interactive |
|
GitHub |
4 |
532K |
46 |
2023-09-17 11:40:16 |
2026-02-26 17:26:45 |
2023-09-17 11:40:16 |
|
Anna's Archive |
https://annas-software.org/AnnaArchivist/annas-archive |
|
 Git |
0 |
166.3M |
3270 |
2024-06-29 12:06:49 |
2026-02-25 21:06:45 |
2023-07-14 14:33:28 |
|
Benchmarks for use with IntelLabs/flrc. - Intel Labs - IntelLabs |
https://github.com/IntelLabs/flrc-benchmarks |
|
GitHub |
6 |
6.0M |
15 |
2023-09-17 11:38:46 |
2026-02-26 17:16:46 |
2023-09-17 11:38:46 |
|
Camellia cores - FreeCores - freecores |
https://github.com/freecores/camellia-vhdl |
|
GitHub |
0 |
868K |
8 |
2023-09-17 10:42:36 |
2026-02-26 10:03:43 |
2023-09-17 10:42:36 |
|
Common SV components - pulp-platform |
https://github.com/pulp-platform/common_cells |
|
GitHub |
160 |
7.0M |
696 |
2025-06-03 13:06:45 |
2026-02-24 13:16:43 |
2022-07-24 14:00:53 |
|
Computer Vision Annotation Tool (CVAT), web-based, annotate video and images |
https://github.com/opencv/cvat |
|
GitHub |
0 |
887.2M |
23611 |
2026-02-21 06:46:51 |
2026-02-24 14:46:44 |
2019-01-22 00:31:01 |
|
Content-Defined Chunking, after rsync / Rabin fingerprinting / FastCDC / Ronomon's algorithm. - Tony Garnock-Jones - tonyg |
https://github.com/tonyg/racket-content-defined-chunking |
|
GitHub |
0 |
320K |
4 |
2023-07-04 20:57:09 |
2026-02-24 14:46:44 |
2019-01-21 17:31:01 |
|
Demosaic (Bilinear) - FreeCores - freecores |
https://github.com/freecores/bilinear_demosaic |
|
GitHub |
5 |
1.9M |
2 |
2023-09-17 10:42:58 |
2026-02-26 10:03:43 |
2023-09-17 10:42:58 |
|
Digital logic designer and simulator - REDS institute - reds-heig |
https://github.com/reds-heig/logisim-evolution |
|
GitHub |
0 |
193.9M |
6697 |
2025-11-13 04:16:52 |
2026-02-24 13:36:42 |
2019-01-21 06:31:01 |
|
Document your SQLite tables and columns with in-line comments - Alex Garcia - asg017 |
https://github.com/asg017/sqlite-docs |
|
GitHub |
0 |
444K |
2 |
2024-01-14 10:58:18 |
2026-02-27 10:17:06 |
2024-01-14 10:58:18 |
|
grlib - verilog/vhdl cores - Philippe Faes - philippefaes |
https://github.com/philippefaes/grlib |
|
GitHub |
13 |
21.3M |
8 |
2022-07-24 10:58:42 |
2026-02-24 18:26:45 |
2022-07-24 10:58:42 |
|
Haskell Research Compiler - Intel Labs - IntelLabs |
https://github.com/IntelLabs/flrc |
|
GitHub |
37 |
2.4M |
997 |
2023-09-17 11:40:28 |
2026-02-26 17:26:45 |
2023-09-17 11:40:28 |
|
High Performance Analytics Toolkit (HPAT) is a Julia-based framework for big data analytics on clusters. - Intel Labs - IntelLabs |
https://github.com/IntelLabs/HPAT.jl |
|
GitHub |
16 |
992K |
712 |
2023-09-17 11:40:22 |
2026-02-26 17:26:45 |
2023-09-17 11:40:22 |
|
iACT - Intel Labs - IntelLabs |
https://github.com/IntelLabs/iACT |
|
GitHub |
8 |
28.5M |
6 |
2023-09-17 11:37:56 |
2026-02-26 17:16:46 |
2023-09-17 11:37:56 |
|
icestudio.github.io - FPGAwars - FPGAwars |
https://github.com/FPGAwars/icestudio.github.io |
|
GitHub |
0 |
136K |
0 |
2023-09-17 09:45:54 |
2026-02-25 23:16:48 |
2023-09-17 09:45:54 |
|
Instructions database and utilities for X86/X64 and ARM (THUMB/A32/A64) architectures. - AsmJit - asmjit |
https://github.com/asmjit/asmdb |
|
GitHub |
55 |
996K |
73 |
2023-10-17 09:37:07 |
2026-02-24 18:46:43 |
2022-07-24 13:13:56 |
|
Intel Heterogeneous Research Compiler (iHRC) - Intel Labs - IntelLabs |
https://github.com/IntelLabs/iHRC |
|
GitHub |
10 |
89.1M |
14 |
2023-09-17 11:39:27 |
2026-02-26 17:16:46 |
2023-09-17 11:39:27 |
|
Italian female Hidden semi-Markov model voice kindly made available by Fabio Tesser@gh - marytts |
https://github.com/marytts/voice-istc-lucia-hsmm |
|
GitHub |
2 |
1.7M |
39 |
2023-09-17 13:31:58 |
2026-02-27 01:36:45 |
2023-09-17 13:31:58 |
|
Open Source OS for Open Source Digital Fabrication Machines - Open Lab Starter Kit - Open-Lab-Starter-Kit |
https://github.com/Open-Lab-Starter-Kit/Open-Lab-Operating-System |
|
GitHub |
0 |
2.5M |
22 |
2024-12-03 22:46:56 |
2026-02-27 11:57:04 |
2024-02-11 17:47:11 |
|
Parallelizing word2vec in shared and distributed memory - Intel Labs - IntelLabs |
https://github.com/IntelLabs/pWord2Vec |
|
GitHub |
40 |
704K |
16 |
2023-09-17 11:38:06 |
2026-02-26 17:16:46 |
2023-09-17 11:38:06 |
|
Pillar compiler, Pillar runtime, garbage collector. - Intel Labs - IntelLabs |
https://github.com/IntelLabs/flrc-lib |
|
GitHub |
8 |
1.4M |
83 |
2023-09-17 11:39:21 |
2026-02-26 17:16:46 |
2023-09-17 11:39:21 |
|
Recurrent Neural Network Language Modeling (RNNLM) Toolkit - Intel Labs - IntelLabs |
https://github.com/IntelLabs/rnnlm |
|
GitHub |
24 |
564K |
11 |
2023-09-17 11:40:40 |
2026-02-26 17:26:45 |
2023-09-17 11:40:40 |
|
Segment-of-interest low-communication FFT algorithm - Intel Labs - IntelLabs |
https://github.com/IntelLabs/SOI_FFT |
|
GitHub |
2 |
1.6M |
14 |
2023-09-17 11:40:34 |
2026-02-26 17:26:45 |
2023-09-17 11:40:34 |
|
SIMD optimizations related to 2D computer graphics - Petr Kobalicek - kobalicek |
https://github.com/kobalicek/simdtests |
|
GitHub |
14 |
244K |
8 |
2022-07-24 11:02:19 |
2026-02-24 18:46:43 |
2022-07-24 11:02:19 |
|
The CompilerTools package, part of the High Performance Scripting project at Intel Labs - Intel Labs - IntelLabs |
https://github.com/IntelLabs/CompilerTools.jl |
|
GitHub |
9 |
976K |
499 |
2023-09-17 11:39:48 |
2026-02-26 17:16:46 |
2023-09-17 11:39:48 |
|
The earliest versions of the very first c compiler known to exist in the wild written by the late legend himself dmr. - Roger - mortdeus |
https://github.com/mortdeus/legacy-cc |
|
GitHub |
0 |
976K |
15 |
2025-09-19 13:36:41 |
2026-02-24 13:36:42 |
2022-07-24 16:14:35 |
|
The Julia Language: A fresh approach to technical computing. - Intel Labs - IntelLabs |
https://github.com/IntelLabs/julia |
|
GitHub |
3 |
115.7M |
38694 |
2023-09-17 11:37:18 |
2026-02-26 17:16:46 |
2023-09-17 11:37:18 |
|
The ParallelAccelerator package, part of the High Performance Scripting project at Intel Labs - Intel Labs - IntelLabs |
https://github.com/IntelLabs/ParallelAccelerator.jl |
|
GitHub |
31 |
46.8M |
2154 |
2023-09-17 11:38:19 |
2026-02-26 17:16:46 |
2023-09-17 11:38:19 |
|
The Servo Browser Engine - Servo - servo |
https://github.com/servo/servo |
|
GitHub |
3510 |
1.3G |
55788 |
2026-02-10 04:46:49 |
2026-02-27 06:56:41 |
2023-09-17 16:27:17 |
|
Vector Acceleration IP core for RISC-V* - Intel Labs - IntelLabs |
https://github.com/IntelLabs/riscv-vector |
|
GitHub |
27 |
26.4M |
10437 |
2025-05-12 14:56:42 |
2026-02-27 15:06:44 |
2025-03-01 18:11:18 |
|
Verification system for effectful programs - FStarLang |
https://github.com/FStarLang/FStar |
|
GitHub |
248 |
778.4M |
45064 |
2026-01-31 22:26:52 |
2026-02-24 21:07:02 |
2022-07-24 15:38:12 |
|
wfw - pballett |
https://github.com/pballett/whatfreewords |
|
GitHub |
59 |
4.5M |
21 |
2022-07-24 13:21:21 |
2026-02-25 06:16:44 |
2022-07-24 13:21:21 |
|
WireGuard for the Linux kernel. |
https://git.zx2c4.com/wireguard-linux/ |
|
Git |
0 |
5.9G |
1421377 |
2025-11-07 00:57:28 |
2026-02-24 22:16:44 |
2020-06-09 00:39:34 |
|
WS2812 RGB LED string driver - FreeCores - freecores |
https://github.com/freecores/ws2812 |
|
GitHub |
0 |
708K |
2 |
2023-09-17 10:43:27 |
2026-02-26 10:03:43 |
2023-09-17 10:43:27 |
Mirror (Self)