| 4 stage, in-order, secure RISC-V core based on the CV32E40P - OpenHW Group - openhwgroup |
 GitHub |
https://github.com/openhwgroup/cv32e40s | |
| Size | 38.3M (38.2M (+92K)) | |
| Commits | 5194 (5189 (+5)) | |
| Update Stats | 0s ... 24s [Ø (last 10) 3s (3,3,3,5,3,4,3,3,4,3))] | |
| Last Change | 2024-11-01 13:57:07 | |
| Last Check | 2025-09-10 11:46:41 | |
| Created | 2022-07-24 10:53:57 |
Operation
Mirror (Self)Verifying url ...Mail to Andreas Kupries